In recent years, with rapid development, the narrow bezel display technology is gradually becoming the mainstream of flat panel display technology. The narrow bezel display technology is widely used in small or medium size flat panel display with thin film transistor, such as smart phones and tablets. TFT integrated driver circuit (Gate-driver on Array, GOA) design is essential for realizing narrow bezel display. With adopting of GOA circuit, not only the TFT display panel becomes compact due to significant decrease of bezel size of the display, but also the number of source and gate driving chip and the related connections be reduced. In addition, the following module and packaging process can also be reduced. Consequently, the manufacturing cost of the display can be greatly reduced, and the reliability of the TFT display panel can also be improved. In additions, restricting of leading pads' pitch on implementation of high-resolution displays can be relieved as number of external connections can be decreased obviously.
With the promotion of the smart home concept, the demand of large size TV panel with high-resolution and high performance is increasing. Thus the design of GOA circuit suitable for high performance TV panel becomes urgently needed. Therefore, the study of new GOA circuit for TFT industry is of great significance, which is not only because the TV panel is the key point of TFT industry development, but also we have a greater advantage to accumulate new intellectual property in this field. The most concerned issue of GOA design for TV panel is reliability. Different with small size display panel, the operating frequency of TV panels is much higher, and the product lifetime is required to be longer.
However, there are many problems in realization high-performance GOA with high reliability. One of the most important challenges for GOA design is the threshold voltage shift of TFT due to the gate bias stress. In the past ten years, the main method to improve GOA reliability is by compensating the deficiency of the TFT device characteristics. But generally speaking, up to date, only TFT device are concerned, and methods of suppressing shift of electrical characteristics are proposed.
In a variety of previous GOA circuits, constant gate biasing mode is popularly used for the low level holding TFTs. However, according to the GOA circuit operating principle, constant-biasing method leads to the low-level-holding TFTs biasing with high gate voltage with unnecessarily long operating time, thus the threshold voltage shift of TFT is large and the life of the circuit is difficult to be prolonged. As showed in the FIG. 12, almost all the GOA circuits comprise 3 basic modules: input, output and low-level-holding module. The T100 is input device; the T200 is output device, which outputs the line scan pulse signal; the T300 and T400 are low level holding devices, whose gate input voltage is high as a constant value. There are usually overlap capacitance between the gate electrode and the source-drain electrode, as CGD of T200 as showed in FIG. 12. During the low level holding period, when clock signal of the T200 drain switches from low level to high level, the voltage potential of gate electrode of T200, which is originally at the low level, will rise due to the coupling of CGD. If the feed-through induced voltage-rising trend cannot be well suppressed, T200 will switch to the sub threshold region or even the on region, which will lead to a very large charging current at the output electrode and the output cannot be maintained low. At this time, T300 and T400 are turned on, and the gate of T200 and output electrode can be pulled-down, respectively. But one of the main problems is that the threshold voltage of TFTs is prone to increases with the time under the electric stress, which leads to the degradation of the conducting ability. When the threshold voltage increases from the initial value (such as VTH0) to a certain critical value (such as VTHC), T300 and T400 is no longer being able to maintain the low level of gate electrode of T200 and the output, and the circuit starts to malfunction.
According to the operation principle of the mentioned GOA circuit, for normal operating, the gate-to-source over-drive voltage (the difference between the gate-source voltage and the threshold voltage) of T300 and T400 is required to be slightly larger than the difference (VTHC−VGL−VGH). Here the VGH and VGL represents high/low level of clock signal, respectively, for driving T300 and T400. But in previous GOA circuits, the level of the driving clock signal of the low level holding device is constant. Thus for most of the time, especially for early operating time, over-drive voltage of T300 and T400 is much greater than the difference (VGH−VTHC−VGL−). For example, VGH, VTHC, VTH0 and VGL are 25V, 20V, 3V, and 0V, respectively. In the early stage of the circuit operating, the required gate over-drive voltage of T300 and T400 is only 5 V, but the actual value of the over-drive voltage (VGH−VTH0−VGL) reaches 22 V. Both theoretical and experimental results show that the shift of the threshold voltage accelerates due to the increase of the driving voltage. To sum up, due to the constant biasing method, in the previous GOA circuits, the high level of the clock signal is constant, threshold voltage of relevant TFTs shift too fast and circuit life is difficult to be prolonged.